multi-rate video cable equalizer (soic) cyv15g0101eq cypress semiconductor corporation ? 198 champion court ? san jose , ca 95134-1709 ? 408-943-2600 document #: 001-04184 rev. *d revised october 11, 2006 features ? multi-rate adaptive equalization ? smpte 292m, smpte 344m, and smpte 259m compliant ? supports dvb-asi at 270 mbps ? cable length indicator for hd-sdi and sd-sdi data rates ? maximum cable length adjustment for hd-sdi and sd-sdi data rates ? carrier detect and mute functionality for hd-sdi and sd-sdi data rates ? equalizer bypass mode ? seamless connection with hotlink ii? family ? equalizes up to 350m of belden 1694a coaxial cable at 270 mbps ? equalizes up to 140m of belden 1694a coaxial cable at 1.485 gbps ? low power 160 mw @ 3.3v ? single 3.3v supply ? 16-pin soic ?0.18- m cmos technology ? pb-free and rohs compliant ? pin-compatible to existing equalizer devices functional description the cyv15g0101eq is a mult i-rate adaptive equalizer designed to equalize and restore signals received over 75 ? coaxial cable. the equalizer is designed to meet smpte 292m, smpte 344m, and smpte 259m data rates. the cyv15g0101eq is optimized to equalize up to 350m of belden 1694a coaxial cable at 270 mbps and up to 140m of belden 1694a coaxial cable at 1.485 gbps. the cyv15g0101eq connects seamlessly to the hotlink ii family of transceiver devices. the cyv15g0101eq has dc rest oration for compensation of the dc content of the smpte pathological patterns. a cable length indicator (cli) provides an indication of the cable length being equalized at hd-sdi and sd-sdi data rates. the maximum cable length adjust (mcladj) sets the approximate maximum cable length to be equalized at sd and hd data rates. the cyv15g0101eq?s differential serial outputs (sdo, sdo ) mute when the approximate cable length set by mcladj is reached. cd /mute is a bidirectional pin that provides an indication of the signal being present at the equalizer inputs. it also cont rols muting the outputs of the equalizer at hd and sd data rates. power consumption is typically 160 mw at 3.3v. equalizer system connection diagram serial links copper cable cyv15g0101eq multi-rate cable equalizer connections cable driver hotlink ii tm serializer hotlink ii tm deserializer [+] feedback [+] feedback
cyv15g0101eq document #: 001-04184 rev. *d page 2 of 10 equalizer block diagram pin configuration (top view) cyv15g0101eq multi-rate video cable equalizer block diagram cyv15g0101eq multi-rate video cable equalizer block diagram differential output cable length analog indicator and mute threshold block carrier detect and mute control block dc restore equalizer cd / mute bypass sdo, sdo sdi, sdi cli mcladj 2 3 4 5 6 7 8 15 14 13 12 11 10 9 16 cyv15g0101eq vcc gnd sdo sdo gnd mcladj bypass cd/mute vcc gnd sdi sdi gnd agc+ agc- cli 16-pin soic top view [+] feedback [+] feedback
cyv15g0101eq document #: 001-04184 rev. *d page 3 of 10 equalizer operation the cyv15g0101eq is a high-speed adaptive cable equalizer designed to equalize standard definition (sd) and high definition (hd) serial digital interface (sdi) video data streams. cyv15g0101eq equaliz er is optimized to equalize up to 350m of belden 1694a cable at 270 mbps and up to 140m of belden 1694a cable at 1.485 gbps. the cyv15g0101eq equalizer contains one power supply and typically consumes 160 mw power at 3.3v. the multi-rate equalizer is designed to me et the smpte 259m, smpte 292m, smpte 344m and dvb-asi video standards. the equalizer meets all pathological requirements for smpte 292m as defined by rp198 and for smpte 259m as defined by rp178. the cyv15g0101eq multi-rate cable equalizer is auto-adaptive from 143 mbps to 1.485 gbps. the cyv15g0101eq equalizer has variable gain and multiple equalization stages that reverse the effects of the cable. this equalization is achieved by separate regulation of the lower and higher frequency components in the signal to give a clean eye. the cyv15g0101eq has dc restoration for compen- sating the dc content of the smpte pathological patterns. pin descriptions cyv15g0101eq single channel cable equalizer name i/o characteristics signal description control signals cli analog output cable length indicator: cli provides an analog voltage proportional to the cable length being equalized. cli works at both sd-sdi and hd-sdi data rates. cd /mute lvttl i/o carrier detect/mute indicator: output: when the incoming data stream is present, the cd /mute outputs a voltage less than 0.8v. when the incoming data stream is not present, the cd /mute outputs a voltage greater than 2.9v. input: when the cd /mute pin is tied to ground, the equalizer?s differential serial outputs are not muted and the mcladj setting is overwritten. when the cd /mute pin is tied to v cc , the equalizer?s differential serial outputs are muted and the mcladj setting is overwritten. mcladj analog input maximum cable length adjust: the maximum cable length to be equalized is set by the voltage applied to the mcladj input. when the maximum cable length set by mcladj is reached, the differential output is muted. mcladj works at both sd and hd data rates. bypass lvttl input equalizer bypass: when bypass is tied to v cc , the signal presented at the equalizer?s differential serial inputs (sdi, sdi ) is routed to the equalizer?s differential serial outputs (sdo, sdo ) without performing equalization. when bypass is tied to gnd, the incoming video data stream is equalized and presented at the equalizer?s serial differential outputs (sdo, sdo ). in equalizer bypass mode, cd /mute is not functional. agc analog automatic gain control: a capacitor of 1 f should be placed between the agc pins. sdo, sdo differential output differential serial outputs: the equalized serial video data stream is presented at the sdo/sdo differential serial cml output. sdi, sdi differential input differential serial inputs: sdi/sdi can accept either a single ended or differential serial video data stream over 75 ? coaxial cable. power vcc power +3.3v power. gnd gnd connect to ground. [+] feedback [+] feedback
cyv15g0101eq document #: 001-04184 rev. *d page 4 of 10 sdi, sdi the cyv15g0101eq accepts single-ended or differential serial video data streams over 75 ? coaxial cable. it is recom- mended to ac-couple the sdi, sdi inputs as they are inter- nally biased to 1.2v. sdo, sdo the cyv15g0101eq has differenti al serial output interface drivers that use current mode logic [cml] drivers to provide source matching for the transmission line. these outputs can be either ac coupled or dc coupled to the hotlink ii serdes device. cli cable length indicator (cli) is an analog output that gives an output voltage proportional to the cable length being equalized. cli gives an approximation of the length of cable at the differential serial inputs (sdi, sdi ). cli works at high definition (hd) data rates as well as standard definition (sd) data rates. the graph in figure 2 illustrates the cli output voltage at various belden 1694a cable lengths. with an increase in cable length, cli output voltage decreases. mcladj maximum cable length adjust (mcladj) sets the approx- imate maximum amount of cable to be equalized. when the maximum cable length set by mcladj is reached, the outputs are muted. mcladj works at sd as well hd data rates. if the mcladj voltage is greater than the cli output voltage, the equalizer serial differential outputs (sdo, sdo ) are muted. if the mcladj voltage is less than cli voltage, then the equalizer?s differential serial outputs (sdo, sdo ) are not muted and the incoming data stream is equalized. the graph in figure 1 illustrates the voltage needed at mcladj input to equalize various belden 1694a cable lengths for sd and hd data rates. the mcladj pin can be left unconnected in appli- cations that do not require muting of the outputs. cd /mute carrier detect/mute (cd /mute) is a bidirectional pin that provides an indication of the signal being present at the equalizer?s input, or it controls the muting of the equalizer?s output. the (cd /mute) operates for both hd and sd data rates. if cd /mute is used as an output and the incoming data stream is not present, the voltage at the cd /mute output will be greater than 2.9v. if cd /mute is used as an output and the incoming data stream is present, then the voltage at the cd /mute output will be less than 0.8v. if cd /mute is used as an input and is tied to ground, the equalizer serial outputs are not muted and the mcladj setting is overwr itten. if the cd /mute is used as an input and is tied to v cc , then the equalizer serial outputs are muted and the mcladj setting is overwritten. when an invalid signal or a signal transmitted with a launch amplitude of less than 500 mv at hd data-rates is received, the equalizer?s serial outputs are muted and the mcladj setting is overwritten. bypass the cyv15g0101eq has a bypass mode that allows the user to bypass the equalizer?s equalization and dc restoration functions. when the bypass mode is tied to v cc , the signal presented at the equalizer?s differential serial inputs (sdi, sdi ) is routed to the equalizer?s di fferential serial outputs (sdo, sdo ) without performing equalization. when bypass is tied to gnd, the incoming video data stream is equalized and presented at th e equalizer?s differential serial outputs (sdo, sdo ). in equalizer bypass mode, cd /mute is not functional. agc a capacitor of 1 f should be placed between the agc pins of the cyv15g0101eq equalizer. [+] feedback [+] feedback
cyv15g0101eq document #: 001-04184 rev. *d page 5 of 10 maximum ratings above which the useful life may be impaired. user guidelines only, not tested storage temperature .............. .............. ...... ?65c to +150c ambient temperature with power applied........... .............. .............. ...... ?55c to +125c supply voltage to ground potential ............... ?0.5v to +3.8v dc voltage applied to outputs in high-z state .......................................?0.5v to v cc + 0.5v dc input voltage......................................?0.5v to v cc +0.5v electro static discharge (esd) hbm .......................> 2000 v (per jedec eia/jesd-a114a) latch-up current ....................................................> 200 ma power-up requirements the cyv15g0101eq contains one power-supply. the voltage on any input or i/o pin cannot exceed the power pin during power-up. operating range range ambient temperature v cc commercial 0c to +70c +3.3v 5% dc electrical characteristics parameter description test conditions min. typ. max. unit v cc supply voltage [1] ? 3.135 3.3 3.465 v p d power consumption [2] ? 125 160 190 mw i s supply current [1] ? 38 48 58 ma v cmout output common mode voltage [1] load = 50 ? ? v cc ? ? v sdo /2 ? v v cmin input common mode voltage [1] [bypass = high] ? 1 1.24 1.4 v input common mode voltage [1] [bypass = low] ? 0 1.24 2.9 v ? cli dc voltage (0m) [1] ? 2.3 2.65 2.95 v ? cli dc voltage (no signal) [1] ? 1.5 1.9 2.3 v ? floating mcladj dc voltage [1] ? 1.1 1.3 1.6 v ? mcladj range [3] ? 0.4 0.72 1.02 v v cd /mute(oh) cd /mute output voltage [1] carrier not present 2.9 ? ? v v cd /mute(ol) carrier present ? ? 0.8 v v cd /mute cd /mute input voltage required to force outputs to mute [1] min. to mute 2.5 ? ? v v cd /mute cd /mute input voltage required to force active [1] max. to activate ? ? 1 v notes 1. production test. 2. calculated results from production test. 3. not tested. based on characterization. [+] feedback [+] feedback
cyv15g0101eq document #: 001-04184 rev. *d page 6 of 10 ac electrical characteristics parameter description test conditions min. typ. max. unit ? serial input data rate [1] ? 143 ? 1485 mbps v sdi input voltage swing single ended, at the transmitter, hd data rate 500 [5] 800 [1] 1200 mv v sdi input voltage swing single ended, at the transmitter, sd data rate 500 [6] 800 [1] 1200 mv ? v sdo output voltage swing [1] differential p-p , 50 ? load 500 700 950 mv ? maximum equalized cable length [1] 270 mbps, belden 1694a, 800 mv transmit amplitude, equalizer pathological pattern, 0.2 ui equalizer output jitter ? 350 ? m 1.485 gbps, belden 1694a, 800 mv transmit amplitude, equalizer pathological pattern, 0.25 ui equalizer output jitter ? 140 ? m ? output rise/fall time [3, 4] 20% - 80%, hd data rate 80 120 220 ps ? output rise/fall time [3, 4] 20% - 80%, sd data rate 80 120 270 ps ? mismatch in rise/fall time [3, 4] ? ? ? 30 ps ? duty cycle distortion [3, 4] hd color bar pattern ? 20 ? ps ? overshoot [3, 4] ? ? ? 10 % ? input return loss [3] ? 15 ? ? db ? input resistance [3, 4] single ended ? 2.5 ? k ? ? input capacitance [3, 4] single ended ? 1 ? pf ? output resistance [3, 4] single ended ? 50 ? ? notes 4. not tested. guaranteed by design simulations. 5. based on characterization across temperature and voltage with 140m of belden 1694a cable, transmitting smpte equalizer pathol ogical test pattern. 6. based on characterization across temperature and voltage with 350m of belden 1694a cable, transmitting smpte equalizer pathol ogical test pattern. [+] feedback [+] feedback
cyv15g0101eq document #: 001-04184 rev. *d page 7 of 10 typical performance graphs (unless otherwise mentioned, v cc = 3.3v, t a = 25c) figure 1. mcladj input voltage vs. belden 1694a cable length at sd-sdi and hd-sdi data rates figure 2. cli output voltage vs. belden 1694a cable length at sd-sdi and hd-sdi data rates cable length (m) voltage (v) 1.7 1.8 1.9 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 0 50 100 150 200 250 300 350 cable length (m) voltage (v) 1.7 1.8 1.9 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 0 50 100 150 200 250 300 350 [+] feedback [+] feedback
cyv15g0101eq document #: 001-04184 rev. *d page 8 of 10 typical application circuit figure 3. interfacing cyv15g0101eq to the hotlink ii serdes cli 1 vcc 2 vee 3 sdi 4 sdi 5 vee 6 agc+ 7 agc ? 8 bypass 9 mcladj 10 vee 11 sdo 12 sdo 13 vee 14 vcc 15 16 cyv15g0101eq +3.3v +3.3v 0.01 f 0. 01 f + 1 f rxle sdasel lpen insel in1+ in1 ? framchar rfen rfmode decmode rxcksel rxmode rxrate rxclkc+ rxclk ? rxclk+ rxst0 rxst1 rxst2 rxop rxd0 rxd1 rxd2 rxd3 rxd4 rxd5 rxd6 rxd7 lfi cyv15g0101dxb bnc jack 6.4 n h 1 f c10 c11 c12 c15 c16 r15 r14 r16 l2 75 ? z 0 z 0 2 z 0 r18 c l i 75 ? 75 ? 37.4 ? c d / m u t e m c l a d j cd/mute 1 f ordering information ordering code package name package type operating range CYV15G0101EQ-SXC sz16.15 pb-free16-lead 150-mil soic 0 to 70c [+] feedback [+] feedback
cyv15g0101eq document #: 001-04184 rev. *d page 9 of 10 ? cypress semiconductor corporation, 2006. the information contained herein is subject to change without notice. cypress semic onductor corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a cypress product. nor does it convey or imply any license under patent or ot her rights. cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agr eement with cypress. furthermore, cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to re sult in significant injury to the user. the inclusion of cypress products in life-support systems application implies that the manu facturer assumes all risk of such use and in doing so indemni fies cypress against all charges. equalizer is a trademark of cypress semi conductor. all product and company names mentioned in this document may be the trademarks of their respective holders. package dimension figure 4. 16-lead (150-mil) soic s16.15 0 ) . ) $ 2 ^ 2 3 % ! 4 ) . ' 0 , ! . % ; = ; = ; = ; = ; = ; = ; = " 3 # ; = ; = ; = ; = ; = ; = ; = ; = ; = ; = $ ) - % . 3 ) / . 3 ) . ) . # ( % 3 ; - - = - ) . - ! 8 ; = ; = 8 2 ; = 2 % & % 2 % . # % * % $ % # - 3
0 ! 2 4 3 3 4 ! . $ ! 2 $ 0 + ' 3 : , % ! $ & 2 % % 0 + ' 0 ! # + ! ' % 7 % ) ' ( 4 g m s 51-85068-*b [+] feedback [+] feedback
cyv15g0101eq document #: 001-04184 rev. *d page 10 of 10 document history page document title: cyv15g0101eq multi-rate cable equalizer document number: 001-04184 rev. ecn no. issue date orig. of change description of change ** 389196 see ecn bcd new pr eliminary data sheet *a 394763 see ecn bcd updated preliminary data sheet for release to the internet *b 431556 see ecn bcd changed ac and dc parameters *c 504487 see ecn fre updated ac and dc parameters. changed data sheet status from preliminary to final *d 514998 see ecn fre fixed typo in diagrams on page 2 [+] feedback [+] feedback
|
